Intel Collective

A space for developers to collaborate on Intel software tools, libraries, and resources. Share knowledge and connect with Intel product experts. Find the information you need to drive innovation and simplify development from edge to cloud with Intel.
A space for developers to collaborate on Intel software tools, libraries, and resources. Share knowledge and connect with Intel product experts. Find the information you need to drive innovation and simplify development from edge to cloud with Intel.

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13 minute read
How-to guide

Migrating the Odd-Even Merge Sort from CUDA* to SYCL*

Overview This document demonstrates how an odd-even merge sort algorithm written in CUDA* can be migrated to the SYCL* heterogenous programing language. Odd-Even Merge Sort The odd-even merge sort ...
Pinned
3 votes
91 views
1 minute read
How-to guide

How to accelerate your TensorFlow models on Intel compute devices

There are many TensorFlow application developers who might be looking for better off-the-shelf performance on their TensorFlow models, and who are also interested in leveraging various benefits of the ...

Questions

Browse questions with relevant Intel tags

27,699 questions

-3 votes
0 answers
15 views

Need help completing simple assembly program

Here's my program so far: # # Usage: ./calculator <op> <arg1> <arg2> # # Make `main` accessible outside of this module .global main # Start of the code section .text # int main(...
-1 votes
1 answer
28 views

Dividing two inputted numbers in assembly

.586 .MODEL FLAT INCLUDE io.h ; header file for input/output .STACK 4096 .DATA number1 DWORD ? number2 DWORD ? prompt1 BYTE "Enter the number of gallons of gas the car can ...
-1 votes
0 answers
48 views

Can't run assembly program in VS 2022

I'm trying to run an assembly program but it doesn't seem to work. I am very new to this. DATA number QWORD -105 sum QWORD ? .CODE main PROC mov rax, ...
0 votes
0 answers
23 views

Error Calling dmumps_c() and zmumps_c() for MUMPS 5.5.1.5

I m using MUMPS 5.5.1.5 compiled with CMake 3.24.2 and Intel one Api on Windows . After generating and Building the projects . I Had called dmumps_c() and zmumps_c() from mumps libraries . ...
1 vote
1 answer
6 views

"Serial Loader Device is missing" during Convert Programming File with Quartus Prime

I try to convert multiple SRAM object (.sof) files to one JTAG indirect configuration file (.jic) using Quartus Prime, however I always receive the following error message. Serial Flash Loader device ...
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0 votes
0 answers
14 views

How to develop an OpenCL application targeting specifically Intel CoffeeLake-H GT2 (UHD Graphics 630) without this device?

I've been tasked to develop an OpenCL application for a specific platform, Intel CoffeeLake-H GT2 (UHD Graphics 630). There are two problems for me: Even having some OpenCL programming experience (...
0 votes
0 answers
10 views

Python access FTDI device by pyFTDI but get the INVALID_HANDLE error

I want to establish a Python platform so that I can read and write my FTDI device (USB-Blaster, Altera DE0-nano). And fortunately, I got a great example on Github called ftdi2.py, it can detect my USB-...
-1 votes
0 answers
43 views

What does this program say?

Can someone explain me what this program does? I am new to this. For example, what does push do in this case? From my knowledge push is like adding information into the stack but I am not quite sure. ...
0 votes
2 answers
62 views

What implements the stack in a typical process' memory?

I have always been confused about where 'the stack' is implemented. I know about the typical memory layout for a process (at least on Unix-like systems) but I've always wondered what actually sets the ...
  • 11
0 votes
0 answers
47 views

Intel Compiler Openmp SIMD AVX512 performance problem

I am learning the openmp simd part and wrote a small program to test the performance of simd. System is centos7.The cpu I am using is Intel(R) Xeon(R) Gold 6258R CPU @ 2.70GHz, which I believe ...
0 votes
0 answers
28 views

I'm stuck on a problem where I am asked to convert assembly instruction to high level statement

I am asked to "Write an equivalent high level statement of the following assembly instructions" and I am told to "Assume that x in %rdi, y in %rsi, z in %rdx". I'm a bit confused ...
  • 1
0 votes
0 answers
31 views

adding integers in assembly using loop

i'm trying to write a code that print all array elements and print the sum of it, also it copy the a1 elements's and paste in a2 note the type of arrays should be byte it works but it is print the ...
0 votes
1 answer
36 views

What does x86 `movq %rsp, (%rdi)` and `movq (%rsi), %rsp` do and how are they different?

I am playing with some "just for fun" code that implements custom threading. Of course, it has to implement context switching too, and this bit comes from the context-switching function: ...
  • 3,492
1 vote
0 answers
81 views

code using ah=42h cannot long jump into second sector

In my previous question, I had an issue using ah=0x2 in which I could not read more than 65 sectors. I was recommended to use ah=42h, and after changing my code, I can confirm that it does read more ...
0 votes
1 answer
46 views

What is the Default addition Operator '+' of __m64

I found that the following code(C Files) can be compiled successfully in x86_64, gcc 10.1.0. #include <immintrin.h> #include <stdint.h> #include <stdio.h> typedef union{ __m64 x;...
0 votes
0 answers
25 views

sycl vector types are not marked as device copyable

This line: static_assert( sycl::is_device_copyable<sycl::float3>::value, "The vector types should be copyable." ); Fails with the static assert error for all vector types in ...
0 votes
0 answers
33 views

assembly include irvine on win10 //bootcamp

my laptop is mac pro i7 I have assembly course this semester and I have to working on VS2022 so I install windows through bootcamp win10 and install vs2022 when I write any code with .model flat// ....
0 votes
2 answers
108 views

Why does using the "register" keyword makes my code faster?

I am learning/re-learning C, and I've learnt about the register keyword. On many websites, people said it is recommended to not be used, or even useless. The book I am using says it is useful in for-...
  • 111
-1 votes
0 answers
65 views

Quartus Failure for initialization ROM memory by using $readmemh task

I initialized my ROM memory (instr_mem) by using the $readmemh task. The ROM was successfully complied and simulated, but the waveform show 32'hxxxxxxxx in instr_mem. It seems the 'instr_mem' didn't ...
0 votes
3 answers
107 views

Inline asm jmp - 'invalid operand for instruction'

I'm doing some code injections, and I find it difficult to transcribe the code from C to Rust. The situation is as follows, at the relative address 0x40147D we put a jump to the address of the ...
-2 votes
2 answers
43 views

How to drive outputs in Verilog

I am trying to implement I2C in a FPGA to learn verilog, i am a complete beginner and am having trouble with an error: Error (10028): Can't resolve multiple constant drivers for net "rComStarted&...
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0 votes
1 answer
35 views

Vtune Memory Leak helper

I am using VTune to take memory statics for my app memory leak detection. My Python app have a memory steady increase, it turns out there are "make_new_set" calls which keep creating python ...
0 votes
0 answers
17 views

Cannot install libpulse-dev:i386 and libspeechd-dev:i386 on Ubuntu

When I run sudo dpkg --add-architecture i386 sudo apt-get update sudo apt-get -u dist-upgrade sudo dpkg --configure -a sudo apt --fix-broken install sudo apt-get install libspeechd-dev:i386 libpulse-...
  • 75
0 votes
0 answers
28 views

Is there a way to enable programmatically L1 L2 L3 caches using msr-tools on Linux?

We have a server with Intel(R) Xeon(R) Gold 6338N CPU @ 2.20GHz. For this server the L1, L2, L3 caches seem not enabled... Is there a way to check the CPU registers with msr tools (rdmsr/wrmsr) on ...
2 votes
1 answer
39 views

Error code A4011 multiple .MODEL directives, but I only have one in my code

I am using Visual studio 2022 Community using MASM and Kip Irvine's libs and such. I have to use them for the class I am in currently ( both VS and Kip ) It took me days to figure out how to just get ...
  • 23
0 votes
0 answers
14 views

Intel IPP Erode Access Violation Exception

I made a simple script using the ErodeBorder function in IPP, and I want to use ippiErode_1u_C1R_L. I am having trouble using ippiErode_1u_C1R_L I keep getting an AccessViolation Exception. First ...
1 vote
2 answers
75 views

How to hook an unknown number of functions - x86

Problem description At runtime, I am given a list of addresses of functions (in the same process). Each time any of them is called, I need to log its address. My attempt If there was just one function ...
  • 894
0 votes
1 answer
89 views

The requested image's platform (linux/arm64/v8) does not match the detected host platform (linux/amd64) and no specific platform was requested

My server and docker info. are as follows: Linux xxx 3.10.0-1160.66.1.el7.x86_64 #1 xxx x86_64 x86_64 x86_64 GNU/Linux Docker version 20.10.17 Client: Context: default Debug Mode: false ...
  • 1,311
0 votes
0 answers
33 views

Valgrind detects memory leaks in MKL/LAPACK STEVR function for eigenvalue problems with matrix sizes above a threshold

I am working on software that uses the Intel MKL implementation of LAPACK functions for eigenvalue problems. When I ran Valgrind to check the code for memory leaks it reported errors only when using ...
  • 300
0 votes
0 answers
24 views

Why are the high bits set to 1 in so much of what I see when inspecting random addresses in lldb?

I don't know how to use this tool very well, I was only ever a mediocre C programmer, and my knowledge of assembly stops right about at the 6502. This is on a Mac, retail software, and it's a 32-bit ...
  • 4,466
0 votes
1 answer
70 views

x86 rep instructions, lock prefix, atomics and real-time

Consider the following case: Thread A (evil code I do not control): # Repeat some string operation for an arbitrarily long time lock rep stosq ... Thread 2 (my code, should have lock-free behaviour):...
1 vote
1 answer
39 views

syscall in ROP gadget chain not running

I'm trying to call execve("/bin/cat", "filename" , NULL) via a chain of ROP gadget I'm able to step through the syscall but no output or error is shown so I'm not sure what is the ...
  • 373
2 votes
1 answer
58 views

How to pass array from assembly to a C function

I wanna pass an array defined in assembly code to a C function, but i'm getting a segment violation error when i try to access that array in my C code. Here is the assembly code (i'm using nasm): %...
0 votes
1 answer
72 views

Configuring CMake and Microsoft Visual Studio 2019 for Use with Intel Compilers

I tried to determine if CMake is an option to simplify the cross-platform development of a c++ library that I am working on. Linux is done. Now, I am trying to use CMake on windows. Setting up CMake ...
1 vote
1 answer
44 views

How to compare disassembly of zero cost exceptions with the old approach?

I want to understand how "zero-cost exceptions" differ from the previous approach used to compile exceptions, so I want to look at the assembly code of some program compiled using both, to ...
  • 229k
1 vote
0 answers
44 views

GDB: No line X in file "foo.asm"

I'm writing code in both C and x86 Assembly with NASM. I'm using gdb to compile (with gdb-dashboard, if that's important). When I try to set a breakpoint with b foo.asm:5 I get a No line 5 in file &...
  • 31
0 votes
0 answers
43 views

Assembly error message: bad register name

I have the following assembly code: .data .globl shellcode shellcode: jmp over_string string_addr: .ascii "/bin/shNAAAAAAAABBBBBBBB" over_string: leaq string_addr(%rip), %rdi xorl %eax, %eax ...
0 votes
0 answers
19 views

MPI/python application trace

I have an MPI python application and I tried to trace it using intel trace analyzer and collector. I am running my application on a HPC, I tried to get the .stf trace files to be used as input to ...
  • 149
0 votes
0 answers
43 views

Troubleshooting booting custom OS to hardware

I have been writing a 32 bit operating system (because why not) to run on an old PC. However, whilst the OS(?) is working when run on an emulator, it doesn't run as expected on the aforementioned PC :(...
  • 1
0 votes
0 answers
84 views

CreateFileA, CreateFileW don't work in masm64 (Russian Variant)

I'm using a Russian variant of the MASM64 SDK that can be found here. My code is: OPTION DOTNAME option casemap:none include G:\Programs\Soft\Coding\MASM\masm64\Include\win64.inc include G:\Programs\...
  • 11
0 votes
1 answer
38 views

How would I use base addressing mode to save character into variable?

I'm new to Assembly and learning the basics, but i've been stuck for a while on this and don't know how to get past it. The code below works, but not using the required base addressing mode. I have to ...
0 votes
0 answers
51 views

Deterministic floats in C17

I recently learned about the wonders of non deterministic results of floats between compilers and platforms. I'd be targeting x64 (SSE4.2. No 32-bit build. Windows) and ARM NEON (Android) with precise ...
  • 36
1 vote
1 answer
37 views

NASM .bss variable error "Access violation writing location 0x000000000000000C."

I'm very much a newbie on assembly and NASM. I'm trying to define a variable in the .bss section and use it but I couldn't get it to run. It gives me this error: "Access violation writing ...
  • 21
3 votes
0 answers
53 views

Why is it that assembling/linking in one step loses debug info for my assembly source?

When I build my source code using two steps: localhost % clang -g -c factorial.s localhost % clang -o factorial factorial.o I get debug info about the assembly source. localhost % lldb ...
  • 274
1 vote
1 answer
40 views

Problem understanding far jump after entering protected mode

In my bootloader code there is a section in which we switch the cpu to protected mode by loading the GDT and enabling the control register bit. This is the portion of bootloader code: init_pm: ... ...
  • 25
0 votes
0 answers
28 views

Can't find MASM's file age

My task: "Use the GetOpenFileName function to select a file. Check if the age of the file is less than 3 days, execute it. Otherwise, display a dialog box with a question about deleting the file. ...
0 votes
1 answer
62 views

Compiler optimization when variables are reused

While benchmarking 'subtracting a vector from a matrix', I noticed Fortran compilers appear to be performing some sort of optimization when I reuse variables/code. It looks like the arrays are being ...
  • 1,084
-4 votes
0 answers
79 views

ATTENTION! No OpenCL Metal HIP or CUDA installation found when hashcat commond

i found error in hashcat when i run :- C:\Users\hp\Desktop\hashcat-6.2.6>hashcat -m 2500 -b and result is : C:\Users\hp\Desktop\hashcat-6.2.6>hashcat -m 2500 -b hashcat (v6.2.6) starting in ...
6 votes
0 answers
168 views

Why does CPU=8 in Intel Core i9-12900K have the fastest access to all other cores?

This is the original tests. The figure shows that CPU=8 in Intel Core i9-12900K has the fastest access to all other cores. Therefore, I am wondering what makes it happen. Besides, I am also curious ...
  • 338
-1 votes
0 answers
64 views

memcpy-ing intel x86 opcodes into memory causes general protection fault

I'm trying to make a simple program loader for my OS and I have code which copies a 128-member u16 array into an address (currently 0x4400) by iterating through the array copying a number into the ...
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